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FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
With a calibration strategy, the output current sensing
precision can be improved significantly. One calibration point
at 25 °C for 50% of FSR allows removing part to part
contribution. So, the calibrated part precision goes down to ?
+/-6.0% over [20% - 75%] output current FSR, over voltage
range (10 to 16 V) and temperature range (-40 to 125 °C).
With dedicated calibration points, the current recopy
allows diagnosing lamp damage in paralleling operations, like
as flasher topology. The Figure 15 summaries test results
The board temperature feedback is not active in Fail
mode.
With a calibration strategy, the temperature monitoring
precision can be improved. So, one calibration point at 25 °C
allows removing part to part contribution, as presented in
Figure 17 .
covering 99.74% of parts (device ageing not included) for
Standard lamps and LEDs.
2.5
typ
min
max
2
1.5
1
0.5
0
-40
-20
0
20
40 60 80 100
120
140
160
180
Board tem perature (°C)
Figure 17. Analog Temperature Precision with
Calibration Strategy
Output Status
The 35XS3500 provides the state of OUT1:OUT5 outputs
in real time through SPI. The OUT bit is set to logic [1] when
Orange = LED mode
Blue = lamp mode (default mode)
Figure 15. Current Sense Precision with Calibration
Strategy
Board Temperature Feedback
The 35XS3500 provides a voltage proportional to the
temperature on the GND flag. This analog feedback is
available in CSNS output pin for MUX[2,0] bits set to “111”,
as described in Figure 16 .
the corresponding output voltage is closed to half of battery.
This bit allows synchronizing current sense and diagnosing
short-circuit between OUT and VBAT pins.
Temperature Prewarning
The 35XS3500 provides a temperature prewarning
reported via the SPI (OTW bit) in Normal mode. The
information is latched. To delatch, a read SPI command is
needed. In case of a Power on Reset, the fault will be reset.
External Pin Status
The 35XS3500 provides the status of the FLASHER, IGN,
STOP, and CLOCK pins via the SPI in real time and in
2.5
2
1.5
1
typ
min
max
Normal mode.
Failure Handling Strategy
A highly sophisticated failure handling strategy enables
light functionality even in case of failures inside the
component or the light module. Components are protected
against:
?
Reverse Polarity
0.5
0
?
?
Loss of Supply Lines
Fatal Mistreatment of Logic I/O Pins
-40
-20
0
20
40 60 80 100
120
140
160
180
Board tem perature (°C)
Figure 16. Analog Temperature Precision
35XS3500
Analog Integrated Circuit Device Data ?
Freescale Semiconductor
35
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